Invention Grant
US08013378B2 Memory device having additional selection transistors and main bit lines
有权
具有附加选择晶体管和主位线的存储器件
- Patent Title: Memory device having additional selection transistors and main bit lines
- Patent Title (中): 具有附加选择晶体管和主位线的存储器件
-
Application No.: US12270170Application Date: 2008-11-13
-
Publication No.: US08013378B2Publication Date: 2011-09-06
- Inventor: Keita Takahashi
- Applicant: Keita Takahashi
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2007-295491 20071114
- Main IPC: H01L27/108
- IPC: H01L27/108

Abstract:
A semiconductor memory device has an element isolation region between rewrite units of memory cells. A plurality of memory cells are memory cell groups arranged in a row direction, and each memory cell group consists of (8×N) memory cells arranged in a row direction as a unit to be used as a storage region. The number of a plurality of selection word lines is at least eight, and the number of selection transistors corresponding to at least N is connected to each of the plurality of selection word lines. At least one selection transistor in addition to (8×N) selection transistors are connected in total to the plurality of selection word lines. A plurality of main bit lines includes at least one main bit line in addition to (4×N) main bit lines connected to the common drain of a pair of selection transistors.
Public/Granted literature
- US20090121281A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2009-05-14
Information query
IPC分类: