Invention Grant
US08013397B2 Embedded stressed nitride liners for CMOS performance improvement
有权
嵌入式应力氮化物衬垫可提高CMOS性能
- Patent Title: Embedded stressed nitride liners for CMOS performance improvement
- Patent Title (中): 嵌入式应力氮化物衬垫可提高CMOS性能
-
Application No.: US12049450Application Date: 2008-03-17
-
Publication No.: US08013397B2Publication Date: 2011-09-06
- Inventor: Dureseti Chidambarrao , Omer H. Dokumaci
- Applicant: Dureseti Chidambarrao , Omer H. Dokumaci
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Wenjie Li
- Main IPC: H01L27/00
- IPC: H01L27/00
Abstract:
The present invention provides a semiconducting device including a gate region positioned on a mesa portion of a substrate; and a nitride liner positioned on the gate region and recessed surfaces of the substrate adjacent to the gate region, the nitride liner providing a stress to a device channel underlying the gate region. The stress produced on the device channel is a longitudinal stress on the order of about 275 MPa to about 450 MPa.
Public/Granted literature
- US20080164532A1 EMBEDDED STRESSED NITRIDE LINERS FOR CMOS PERFORMANCE IMPROVEMENT Public/Granted day:2008-07-10
Information query
IPC分类:
