Invention Grant
US08013426B2 Transistor having raised source/drain self-aligned contacts and method of forming same
有权
具有升高的源极/漏极自对准触点的晶体管及其形成方法
- Patent Title: Transistor having raised source/drain self-aligned contacts and method of forming same
- Patent Title (中): 具有升高的源极/漏极自对准触点的晶体管及其形成方法
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Application No.: US11965850Application Date: 2007-12-28
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Publication No.: US08013426B2Publication Date: 2011-09-06
- Inventor: Swaminathan Sivakumar
- Applicant: Swaminathan Sivakumar
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Winkle, PLLC
- Main IPC: H01L29/72
- IPC: H01L29/72
Abstract:
A transistor structure and a method of forming same. The transistor structure includes: a semiconductor substrate having a gate-side surface; a gate disposed on the gate-side surface, the gate extending above the gate-side surface by a first height; a semiconductor extension disposed on the gate-side surface and extending above the gate-side surface by a second height larger than the first height, the semiconductor extension including a diffusion region having a diffusion surface located at the second height; and a diffusion contact element electrically coupled to the diffusion surface.
Public/Granted literature
- US20090166759A1 Transistor Having Raised Source/Drain Self-Aligned Contacts And Method Of Forming Same Public/Granted day:2009-07-02
Information query
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