Invention Grant
- Patent Title: Ternary valve input circuit
- Patent Title (中): 三元阀输入电路
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Application No.: US12484670Application Date: 2009-06-15
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Publication No.: US08013630B2Publication Date: 2011-09-06
- Inventor: Hideo Ito
- Applicant: Hideo Ito
- Applicant Address: US AZ Phoenix
- Assignee: Semiconductor Components Industries, LLC
- Current Assignee: Semiconductor Components Industries, LLC
- Current Assignee Address: US AZ Phoenix
- Agency: Cantor Colburn LLP
- Priority: JP2008-154833 20080613
- Main IPC: H03K19/00
- IPC: H03K19/00 ; H03K19/02

Abstract:
A pull-up switching device for controlling connection and non-connection of an input terminal IN and a first supply VDD and a pull-down switching device for controlling connection and non-connection of the input terminal IN and a second supply VSS are provided. The pull-up switching device and the pull-down switching device are operated exclusively on and off in time division to hold and output the state of the input terminal during each operating state from the two output terminals.
Public/Granted literature
- US20090309630A1 TERNARY VALVE INPUT CIRCUIT Public/Granted day:2009-12-17
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