Invention Grant
US08013772B2 Reduced area digital-to-analog converter 有权
减少区域数模转换器

  • Patent Title: Reduced area digital-to-analog converter
  • Patent Title (中): 减少区域数模转换器
  • Application No.: US12651278
    Application Date: 2009-12-31
  • Publication No.: US08013772B2
    Publication Date: 2011-09-06
  • Inventor: Qunying Li
  • Applicant: Qunying Li
  • Applicant Address: US TX Dallas
  • Assignee: Texas Instruments Incorporated
  • Current Assignee: Texas Instruments Incorporated
  • Current Assignee Address: US TX Dallas
  • Agent Dawn V. Stephens; Wade James Brady, III; Frederick J. Telecky, Jr.
  • Main IPC: H03M1/78
  • IPC: H03M1/78
Reduced area digital-to-analog converter
Abstract:
One embodiment of the invention includes a digital-to-analog converter (DAC) system. A resistive ladder comprises a plurality of resistors having an approximately equal resistance and is arranged in a respective plurality of resistive rungs between first and second ends of the resistive ladder. The first end of the resistive ladder can be coupled to an output and at least a portion of the plurality of resistors between the first end and the second end of the resistive ladder can have a physical size that is descending size-scaled in a direction from the first end of the resistive ladder to the second end of the resistive ladder. A switching circuit is configured to connect each of the plurality of resistive rungs to one of a first voltage and a second voltage based on a binary value of a digital input signal to generate a corresponding analog output voltage at the output.
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