A scan driver may include first signal processor adapted to receive an initializing signal, a base clock signal, a base negative clock signal and a feedback signal, and to generate a first output signal, a second signal processor adapted to receive the initializing signal, the first output signal, the base clock signal and the base negative clock signal, and to generate a second output signal and a second negative output signal, a first logic gate adapted to receive the base clock signal and the second output signal, and to generate a first clock signal, and a second logic gate adapted to receive the base clock signal and the second negative output signal, and to generate a second clock signal.