According to one embodiment, an image processing circuit comprising first memory unit which stores image signal, equalizing circuit which, when there is no movement between two picture signals, outputs average signal between the both signals, second memory unit which stores the average signal, pull-down detecting circuit which outputs pull-down interpolation signal for deinterlacing process from a plurality of frames of the pull-down signals when it is determined that the picture signal is based on the pull-down signals upon receipt of the average signal, an output from the second memory unit, and output from the first memory unit, interpolation signal generating circuit which generates interpolation signal, the outputs from the first and second memory units, and noninterlaced scanning conversion circuit which generates noninterlaced signal by adding the pull-down signals to the output from the second memory unit when the picture signal based on the pull-down signals.