A semiconductor memory device is constituted of a plurality of fuses (or anti-fuses) used for internal voltage adjustment or timing adjustment after manufacturing, a selector for sequentially selecting the fuses, and a single-direction latch circuit for latching a fuse breakdown determination result which is produced by determining whether or not each fuse selected by the selector is broken down and which is varied in a single direction from the low level to the high level or in a single direction from the high level to the low level. The semiconductor memory device allows the fuse breakdown determination to progress with a high reliability by use of a relatively small chip area and to cope with a failure in which one or more fuses are accidentally short-circuited to an unwanted potential.