Invention Grant
US08015359B1 Method and system for utilizing a common structure for trace verification and maintaining coherency in an instruction processing circuit
有权
用于在指令处理电路中利用公共结构进行跟踪验证和维持一致性的方法和系统
- Patent Title: Method and system for utilizing a common structure for trace verification and maintaining coherency in an instruction processing circuit
- Patent Title (中): 用于在指令处理电路中利用公共结构进行跟踪验证和维持一致性的方法和系统
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Application No.: US11782238Application Date: 2007-07-24
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Publication No.: US08015359B1Publication Date: 2011-09-06
- Inventor: John Gregory Favor , Joseph Rowlands , Leonard Eric Shar , Richard Thaik
- Applicant: John Gregory Favor , Joseph Rowlands , Leonard Eric Shar , Richard Thaik
- Applicant Address: US CA Redwood City
- Assignee: Oracle America, Inc.
- Current Assignee: Oracle America, Inc.
- Current Assignee Address: US CA Redwood City
- Agency: Osha • Liang LLP
- Main IPC: G06F13/00
- IPC: G06F13/00
Abstract:
An instruction processing circuit for a processor is disclosed. The instruction processing circuit is adapted to provide one or more sequence of operations, based on one or more sequence of instructions, to an execution unit of the processor. The instruction processing circuit comprises at least one cache circuit and the processing circuit includes a sequencer and a page translation buffer coupled to the sequencer for trace verification and maintaining coherency between a memory and the at least one cache.
Information query
