Invention Grant
- Patent Title: Simultaneous multiple thread processor increasing number of instructions issued for thread detected to be processing loop
- Patent Title (中): 同时多线程处理器增加指令发出的线程被检测为处理循环
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Application No.: US12900975Application Date: 2010-10-08
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Publication No.: US08015391B2Publication Date: 2011-09-06
- Inventor: Takenobu Tani
- Applicant: Takenobu Tani
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Greenblum & Bernstein, P.L.C.
- Priority: JP2007-218827 20070824
- Main IPC: G06F9/46
- IPC: G06F9/46
Abstract:
A processor simultaneously issues instructions to multiple threads in a same instruction execution cycle. An instruction issuer controls issuance of an instruction for each of the multiple threads. A detector detects, for each of the multiple threads, whether a loop processing is currently being executed. A unit causes the instruction issuer to increase a number of instructions to be issued when the detector detects that the loop processing is currently being executed.
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