Invention Grant
- Patent Title: Method and apparatus for performing incremental delay annotation
- Patent Title (中): 执行增量延迟注释的方法和装置
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Application No.: US11803988Application Date: 2007-05-16
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Publication No.: US08015524B1Publication Date: 2011-09-06
- Inventor: Derek So , Chris Wysocki
- Applicant: Derek So , Chris Wysocki
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agent L. Cho
- Main IPC: G06F9/455
- IPC: G06F9/455 ; G06F17/50
Abstract:
A method for designing a system on a target device includes identifying components and routing connections impacted by incremental design changes made to a system design. New information is computed to annotate delays for the components and routing connections identified. Delays previously computed for components and routing connections are utilized to annotate delays for components and routing connections that have not been impacted by the changes made to the system design.
Information query
