Invention Grant
- Patent Title: Semiconductor die package including multiple semiconductor dice
- Patent Title (中): 半导体管芯封装包括多个半导体管芯
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Application No.: US12046939Application Date: 2008-03-12
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Publication No.: US08018054B2Publication Date: 2011-09-13
- Inventor: Yong Liu , Qiuxiao Qian
- Applicant: Yong Liu , Qiuxiao Qian
- Applicant Address: US ME South Portland
- Assignee: Fairchild Semiconductor Corporation
- Current Assignee: Fairchild Semiconductor Corporation
- Current Assignee Address: US ME South Portland
- Agency: Kilpatrick Townsend & Stockton LLP
- Main IPC: H01L23/34
- IPC: H01L23/34
Abstract:
A semiconductor die package. The semiconductor die package includes a leadframe structure comprising a first die attach pad, and a second die attach pad laterally spaced from the first die attach pad, a first side and a second side opposite to the first side. The semiconductor die package further includes a first semiconductor die attached the first die attach pad at the first side of the leadframe structure, and a second semiconductor die attached to the second die attach pad at the second side of the leadframe structure. The semiconductor die package further includes a housing material covering at least a portion of the leadframe structure, the first semiconductor die, and the second semiconductor die.
Public/Granted literature
- US20090230536A1 SEMICONDUCTOR DIE PACKAGE INCLUDING MULTIPLE SEMICONDUCTOR DICE Public/Granted day:2009-09-17
Information query
IPC分类:
