Invention Grant
- Patent Title: Input/output interfacing with low power
- Patent Title (中): 输入/输出接口具有低功耗
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Application No.: US12791547Application Date: 2010-06-01
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Publication No.: US08018251B1Publication Date: 2011-09-13
- Inventor: Graeme B. Boyd , Guillaume Fortin
- Applicant: Graeme B. Boyd , Guillaume Fortin
- Applicant Address: US CA Santa Clara
- Assignee: PMC-Sierra, Inc.
- Current Assignee: PMC-Sierra, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Knobbe Martens Olson & Bear LLP
- Main IPC: H03K19/0175
- IPC: H03K19/0175

Abstract:
Apparatus and methods efficiently provide compatibility between CMOS integrated circuits and voltage levels that are different from that typically used by modern integrated circuits. For example, backwards compatibility can be desirable. Older signaling interfaces operate at different voltage levels than modern CMOS integrated circuits and conventional circuits to interface with these other signaling interfaces exhibit relatively high power consumption. In the context of a transmitter with a P-type substrate, an output driver is embodied in a deep N-well with retrograde P-wells and is biased with voltage biases that can float with respect to the VDD and VSS supplies provided to the CMOS integrated circuit. In the context of a receiver with a P-type substrate, a portion of a receiver is embodied in a deep N-well and biased with floating voltage biases such that the receiver is compatible with signaling received from a signaling technology with disparate voltage levels.
Information query
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