Invention Grant
US08018365B1 Continuous-time delta-sigma ADC with compact structure 有权
连续时间Δ-ΣADC,结构紧凑

  • Patent Title: Continuous-time delta-sigma ADC with compact structure
  • Patent Title (中): 连续时间Δ-ΣADC,结构紧凑
  • Application No.: US12723680
    Application Date: 2010-03-14
  • Publication No.: US08018365B1
    Publication Date: 2011-09-13
  • Inventor: Jen-Che Tsai
  • Applicant: Jen-Che Tsai
  • Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
  • Assignee: Mediatek Inc.
  • Current Assignee: Mediatek Inc.
  • Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
  • Agent Winston Hsu; Scott Margo
  • Main IPC: H03M3/00
  • IPC: H03M3/00
Continuous-time delta-sigma ADC with compact structure
Abstract:
A continuous-time delta-sigma Analog to Digital Converter (ADC) with a compact structure comprises a loop filter, a summing circuit, a quantizer, and a current Digital to Analog Converter (DAC). The loop filter is utilized for receiving and noise-shaping an analog input signal, and accordingly outputting a positive and a negative loop voltages. The summing circuit comprises a positive and a negative summing resistors. The summing resistors are utilized for transforming a positive and negative feedback currents to be a positive and a negative feedback voltages, and summing the loop voltages and the feedback voltages so as to generate a positive and a negative summing voltages, respectively. The quantizer is utilized for outputting a digital output signal according to a difference between the positive and the negative summing voltages. The current DAC is utilized for generating the positive and the negative feedback currents according to the digital output signal.
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