Invention Grant
US08018970B2 Under sampled clock signal synchronization aid device and device for reconstructing undersampled clock signals, for a packet-switched network
有权
用于分组交换网络的采样时钟信号同步辅助装置和用于重建欠采样时钟信号的装置
- Patent Title: Under sampled clock signal synchronization aid device and device for reconstructing undersampled clock signals, for a packet-switched network
- Patent Title (中): 用于分组交换网络的采样时钟信号同步辅助装置和用于重建欠采样时钟信号的装置
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Application No.: US12011655Application Date: 2008-07-22
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Publication No.: US08018970B2Publication Date: 2011-09-13
- Inventor: Thierry Tapie , Serge Defrance , Bertrand Huguies
- Applicant: Thierry Tapie , Serge Defrance , Bertrand Huguies
- Applicant Address: FR Boulogne-Billancourt
- Assignee: Thomson Licensing
- Current Assignee: Thomson Licensing
- Current Assignee Address: FR Boulogne-Billancourt
- Agent Robert D. Shedd; Harvey D. Fried; James McKenzie
- Priority: FR0753084 20070206
- Main IPC: H04J3/06
- IPC: H04J3/06

Abstract:
A synchronization aid device is part of receiving communication equipment of an IP network, having a primary clock signal consisting of primary clock pulses spaced apart by a first period. This device comprises i) a required to increment its value by one unit on each primary clock pulse and reset its value to zero each time it reaches a value M, ii) detection means required to generate a secondary clock pulse each time the value of the counter is zero, the secondary clock pulses forming a secondary clock signal having a second period equal to M times the first period, and iii) control means required, each time the receiving equipment receives a packet containing at least one first bit having a first value, to initialize the counter with a chosen value.
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