Invention Grant
- Patent Title: Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering
- Patent Title (中): 具有固有吸气性的砷和磷掺杂硅晶片衬底
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Application No.: US12347336Application Date: 2008-12-31
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Publication No.: US08026145B2Publication Date: 2011-09-27
- Inventor: Robert J. Falster , Vladimir Voronkov , Gabriella Borionetti
- Applicant: Robert J. Falster , Vladimir Voronkov , Gabriella Borionetti
- Applicant Address: US MO St. Peters
- Assignee: MEMC Electronic Materials, Inc.
- Current Assignee: MEMC Electronic Materials, Inc.
- Current Assignee Address: US MO St. Peters
- Agency: Armstrong Teasdale LLP
- Main IPC: H01L21/331
- IPC: H01L21/331 ; H01L21/8222
Abstract:
A process for the preparation of low resistivity arsenic or phosphorous doped (N+/N++) silicon wafers which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, reliably form oxygen precipitates.
Public/Granted literature
- US20090130824A1 ARSENIC AND PHOSPHORUS DOPED SILICON WAFER SUBSTRATES HAVING INTRINSIC GETTERING Public/Granted day:2009-05-21
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