Invention Grant
- Patent Title: Silicon interposer and method for manufacturing the same
- Patent Title (中): 硅插入件及其制造方法
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Application No.: US12465898Application Date: 2009-05-14
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Publication No.: US08026610B2Publication Date: 2011-09-27
- Inventor: Kei Murayama
- Applicant: Kei Murayama
- Applicant Address: JP Nagano-shi
- Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee Address: JP Nagano-shi
- Agency: Rankin, Hill & Clark LLP
- Priority: JP2008-127918 20080515
- Main IPC: H01L23/52
- IPC: H01L23/52

Abstract:
A method for manufacturing a silicon interposer, includes a step of forming a protection film on a surface, on which an element portion is formed, of a silicon wafer, a step of forming open holes according to planar arrangements of through holes which pass through the silicon wafer in a thickness direction, a step of forming the through holes by etching the silicon wafer using the protection film as a mask, a step of forming an oxide film on inner wall surfaces of the through holes by a thermal oxidation, a step of forming a contact hole, which is in communication with the element portion, in the protection film, and a step of forming wirings on both surfaces of the silicon wafer. In the step of forming the wirings, one of the wirings is formed to be connected electrically to the element portion via a contact portion formed in the contact hole.
Public/Granted literature
- US20090283914A1 SILICON INTERPOSER AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2009-11-19
Information query
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