A phase locked loop circuit includes a delay compensation circuit and a phase change circuit. The delay compensation circuit is adapted to generate a delay clock signal by delaying a phase of a first output clock signal by a second phase, the phase of the first output clock signal having a phase leading a phase of an input clock signal by a first phase, and the second phase corresponding to a delay compensation time greater than a period of the input clock signal and greater than the first phase. The phase change circuit is adapted to change the second phase to the first phase and to generate a feedback clock signal having a phase synchronized with the phase of the input clock signal in response to the first phase, wherein the first phase is a phase corresponding to a remainder time resulting from the delay compensation time being divided by the period of the input clock, and wherein the quotient is an integer.