A rendering processing unit of a graphics processor selects a buffer in a frame buffer in which to write rendering data by switching between multiple buffers in the frame buffer and writes rendering data accordingly; a display controller selects a buffer in the frame buffer from which to read rendering data by switching between a plurality of buffers in the frame buffer according to a sequence, and supplies the rendering data read by scanning the frame buffer to a display; a switching signal generating unit generates a buffer switching signal for directing the display controller to switch the buffer in the frame buffer from which to read at a frequency different from a vertical synchronization frequency of the display assumed by the graphics processor.