Invention Grant
- Patent Title: Reduction of quick charge loss effect in a memory device
- Patent Title (中): 降低存储器件中的快速电荷损失效应
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Application No.: US12195552Application Date: 2008-08-21
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Publication No.: US08027200B2Publication Date: 2011-09-27
- Inventor: Vishal Sarin , William Saiki , Frankie F. Roohparvar
- Applicant: Vishal Sarin , William Saiki , Frankie F. Roohparvar
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Leffert Jay & Polglaze, P.A.
- Main IPC: G11C11/34
- IPC: G11C11/34

Abstract:
Methods for reducing quick charge loss effects, methods for programming, memory devices, memory devices, and memory systems are disclosed. In one such method, a programming pulse is applied to the word line to increase the threshold voltage of the memory cells being programmed. A negative voltage pulse is applied to the word line after the programming pulse to force any electrons trapped in the tunnel oxide of memory cells being programmed back into the tunnel region. After the negative pulse, a program verify operation is performed.
Public/Granted literature
- US20100046300A1 REDUCTION OF QUICK CHARGE LOSS EFFECT IN A MEMORY DEVICE Public/Granted day:2010-02-25
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