Invention Grant
- Patent Title: Semiconductor device and method of operating thereof
- Patent Title (中): 半导体装置及其动作方法
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Application No.: US12576450Application Date: 2009-10-09
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Publication No.: US08031513B2Publication Date: 2011-10-04
- Inventor: Hiroyuki Takahashi
- Applicant: Hiroyuki Takahashi
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Foley & Lardner LLP
- Priority: JP2008-266679 20081015
- Main IPC: G11C11/24
- IPC: G11C11/24

Abstract:
A semiconductor device includes: a memory cell; a precharge circuit; a negative potential applying circuit; and a sense amplifier. The memory cell is connected to a first bit line and store data. The precharge circuit is connected to the first and second bit lines and precharges the first and second bit lines to a ground potential. The negative potential applying circuit is connected to the first bit line and applies a negative potential to the first bit line. The sense amplifier is connected to the first and second bit lines and read data based on a difference between a first potential of the first bit line and a second potential of the second bit line. An absolute value of the negative potential is smaller than the difference between the first potential and the second potential.
Public/Granted literature
- US20100091554A1 SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THEREOF Public/Granted day:2010-04-15
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