Invention Grant
US08031524B2 Structures and methods to store information representable by a multiple-bit binary word in electrically erasable, programmable read-only memory (EEPROM) 有权
用于存储由电可擦除可编程只读存储器(EEPROM)中的多位二进制字表示的信息的结构和方法,

  • Patent Title: Structures and methods to store information representable by a multiple-bit binary word in electrically erasable, programmable read-only memory (EEPROM)
  • Patent Title (中): 用于存储由电可擦除可编程只读存储器(EEPROM)中的多位二进制字表示的信息的结构和方法,
  • Application No.: US12392283
    Application Date: 2009-02-25
  • Publication No.: US08031524B2
    Publication Date: 2011-10-04
  • Inventor: Lee Wang
  • Applicant: Lee Wang
  • Applicant Address: US CA Diamond Bar
  • Assignee: FlashSilicon, Inc.
  • Current Assignee: FlashSilicon, Inc.
  • Current Assignee Address: US CA Diamond Bar
  • Agency: Haynes and Boone, LLP
  • Main IPC: G11C16/04
  • IPC: G11C16/04
Structures and methods to store information representable by a multiple-bit binary word in electrically erasable, programmable read-only memory (EEPROM)
Abstract:
Innovative structures and methods to store information capable of being represented by an n-bit binary word in electrically erasable Programmable Read-Only memories (EEPROM) are disclosed. To program a state below the highest threshold voltage for an N-type Field Effect Transistor (NFET) based EEPROM, the stored charge in the floating gate for the highest threshold voltage is erased down to the desired threshold voltage level of the EEPROM by applying an appropriate voltage to the control gate and drain of the NFET. The erase-down uses drain-avalanche-hot hole injection (DAHHI) for the NFET memory device to achieve the precise threshold voltage desired for the NFET EEPROM device. The method takes advantage of the self-convergent mechanism from the DAHHI current in the device, when the device reaches a steady state. For a “READ” operation, a read voltage is applied to the control gate and the drain is connected by a current load to the positive voltage supply. Using the distinctive threshold voltage associated with the different stored charges, the output voltage from the drain is distinctively recognized and converted back to the original n-bit word. A similar method for a PFET EEPROM is also disclosed.
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