Invention Grant
US08031528B2 Flash memory programming and verification with reduced leakage current 有权
闪存编程和验证,减少漏电流

Flash memory programming and verification with reduced leakage current
Abstract:
A flash memory system configured in accordance with an example embodiment of the invention employs a virtual ground array architecture. During programming operations, target memory cells are biased with a positive source bias voltage to reduce or eliminate leakage current that might otherwise conduct through the target memory cells. A positive source bias voltage may also be applied to target memory cells during verification operations (program verify, soft program verify, erase verify) to reduce or eliminate leakage current that might otherwise introduce errors in the verification operations.
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