Supporting limited address mode memory access involves receiving a write request from the processor targeted to a first predetermined address. A data portion of the write request includes a target address of the system memory. In response to determining the write request is targeted to the first predetermined address, the target address is sent via a system interface to be stored in a configuration register of the processor director. A memory access request targeted to a second predetermined address is received from the processor. In response to determining the memory access request is targeted to the second predetermined address, the target address is retrieved from the configuration register of the processor director. The memory access is serviced using the target address retrieved from the configuration register.