Invention Grant
US08032848B2 Performing abstraction-refinement using a lower-bound-distance to verify the functionality of a circuit design 有权
使用下限距离执行抽象化细化以验证电路设计的功能

  • Patent Title: Performing abstraction-refinement using a lower-bound-distance to verify the functionality of a circuit design
  • Patent Title (中): 使用下限距离执行抽象化细化以验证电路设计的功能
  • Application No.: US12362084
    Application Date: 2009-01-29
  • Publication No.: US08032848B2
    Publication Date: 2011-10-04
  • Inventor: In-Ho Moon
  • Applicant: In-Ho Moon
  • Applicant Address: US CA Mountain View
  • Assignee: Synopsys, Inc.
  • Current Assignee: Synopsys, Inc.
  • Current Assignee Address: US CA Mountain View
  • Agency: Park, Vaughan, Fleming & Dowler LLP
  • Agent Laxman Sahasrabuddhe
  • Main IPC: G06F17/50
  • IPC: G06F17/50
Performing abstraction-refinement using a lower-bound-distance to verify the functionality of a circuit design
Abstract:
Embodiments of the present invention provide methods and apparatuses for verifying the functionality of a circuit. The system can determine a lower-bound-distance (LBD) value, such that the LBD value is associated with an LBD abstract model of the CUV which does not satisfy a property. The system can use an abstraction-refinement technique to determine whether the CUV satisfies the property. The system can determine an upper-bound-distance value for an abstract model which is being used in the abstraction-refinement technique, and can determine whether the LBD value is greater than or equal to the upper-bound-distance value. If so, the system can conclude that the abstract model does not satisfy the property, and hence, the system can decide not to perform reachability analysis on the abstract model that is currently being used in the abstraction-refinement technique.
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