Invention Grant
- Patent Title: Semiconductor constructions
- Patent Title (中): 半导体结构
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Application No.: US12837378Application Date: 2010-07-15
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Publication No.: US08035189B2Publication Date: 2011-10-11
- Inventor: Michael A. Smith , Sukesh Sandhu , Xianfeng Zhou , Graham Wolstenholme
- Applicant: Michael A. Smith , Sukesh Sandhu , Xianfeng Zhou , Graham Wolstenholme
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L29/00
- IPC: H01L29/00

Abstract:
The invention includes methods of forming oxide structures under corners of transistor gate stacks and adjacent trenched isolation regions. Such methods can include exposure of a semiconductor material to steam and H2, with the H2 being present to a concentration of from about 2% to about 40%, by volume. An oxide structure formed under the bottom corner of a transistor gate stack can have a bottom surface with a topography that includes a step of at least about 50 Å, and an upper surface directly over the bottom surface and having a topography that is substantially planar. Methodology of the present invention can be utilized to form semiconductor constructions suitable for incorporation into highly integrated circuitry. The highly integrated circuitry can be incorporated into electronic systems, and can, for example, be utilized in processors and/or memory storage devices.
Public/Granted literature
- US20100276781A1 Semiconductor Constructions Public/Granted day:2010-11-04
Information query
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