Invention Grant
- Patent Title: Process insensitive delay line
- Patent Title (中): 过程不敏感的延迟线
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Application No.: US12690124Application Date: 2010-01-20
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Publication No.: US08035433B2Publication Date: 2011-10-11
- Inventor: Hai Yan
- Applicant: Hai Yan
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dickstein Shapiro LLP
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
A delay line including a phase detector having two inputs and one output. The first input of the phase detector is connected to an input of the delay line. The second input of the phase detector is connected to an output of the delay line. The output of the phase detector is connected to a control circuit which controls current flow at a control node to produce a control voltage at the node. A voltage-controlled delay unit is responsible to the control voltage to control a delay applied to a signal at an input of the delay line.
Public/Granted literature
- US20100123489A1 PROCESS INSENSITIVE DELAY LINE Public/Granted day:2010-05-20
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