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US08036054B2 Semiconductor memory device with improved sensing margin 失效
半导体存储器件具有改进的感测裕度

Semiconductor memory device with improved sensing margin
Abstract:
A semiconductor memory device includes a signal generating unit for generating first and second enable signals in response to a power-up signal, a first sub-word line signal driving unit for driving a first sub-word line signal in response to the first enable signal, a first voltage supplying unit for supplying a first voltage to a pair of bit lines in response to the first enable signal, a second sub-word line signal driving unit for driving a second sub-word line signal in response to the second enable signal, and a second voltage supplying unit for supplying a second voltage to a pair of bit lines in response to the second enable signal.
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