A semiconductor storage device includes: a plurality of I/O terminals configured in a block, and including a representative I/O terminal and a non-representative I/O terminal; a plurality of memory cells each associated with the plurality of I/O terminals to store data; a data input portion to which data to be stored in the plurality of memory cells is input; and a data output portion which outputs data stored in the plurality of memory cells, the data input portion including a branch circuit which distributes the data input to the representative I/O terminal to all of the plurality of memory cells when the data to be stored in the plurality of memory cells is input while in test mode, and the data output portion including: a selection circuit which is connected to the representative I/O terminal, and which selects one of the data output from the plurality of memory cells and outputs the selected data from the representative I/O terminal when the data stored in the plurality of memory cells is output while in the test mode; and a dummy circuit which is provided between the non-representative I/O terminal and the memory cell associated with the non-representative I/O terminal.