Invention Grant
- Patent Title: Electronic circuit arrangement
- Patent Title (中): 电子电路布置
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Application No.: US11752147Application Date: 2007-05-22
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Publication No.: US08039971B2Publication Date: 2011-10-18
- Inventor: Khalil Hosseini , Joachim Mahler
- Applicant: Khalil Hosseini , Joachim Mahler
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Slater & Matsil, L.L.P.
- Priority: DE102006023998 20060522
- Main IPC: H01L23/48
- IPC: H01L23/48
Abstract:
Electronic circuit arrangement, includes a chip and a chip carrier having a substrate and a chip contact location. At least the chip contact location is provided with a soldering layer. The chip includes a bonding layer. A silver layer for eutectic bonding with the bonding layer is provided on the soldering layer in the region of the chip contact location.
Public/Granted literature
- US20070284757A1 Electronic Circuit Arrangement and Method for Producing It Public/Granted day:2007-12-13
Information query
IPC分类:
