Invention Grant
- Patent Title: Interface circuit
- Patent Title (中): 接口电路
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Application No.: US12078291Application Date: 2008-03-28
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Publication No.: US08040144B2Publication Date: 2011-10-18
- Inventor: Hiroyuki Aizawa
- Applicant: Hiroyuki Aizawa
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn Intellectual Property Law Group, PLLC
- Priority: JP2007-091694 20070330
- Main IPC: G01R27/08
- IPC: G01R27/08 ; H03K5/22 ; H04B17/00

Abstract:
An interface circuit includes a reference voltage generation circuit to generate a reference voltage, a differential voltage signal generation circuit to convert send data input in sending data into a pair of differential voltage signals and output the pair of differential voltage signals based on the reference voltage generated by the reference voltage generation circuit, a receiver to convert a pair of differential voltage signals input in receiving data and output received data, and a receiver test circuit to perform a sensitivity test of the receiver, the receiver test circuit having a resistance circuit to generate a pair of differential voltage signals having a potential difference being necessary for the sensitivity test of the receiver.
Public/Granted literature
- US20080238491A1 Interface circuit Public/Granted day:2008-10-02
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