A data error correction circuit includes a plurality of one-bit registers, a data error detection unit and a data error correction unit. The data error detection unit detects whether all the data values stored in the plurality of the registers are equal. The data correction unit determines a correct data value based upon each of the stored data values, and corrects each of the data values into the determined correct data value if the data values are not equal. Therefore, the data error correction circuit may correct a data error due to electrostatic discharge (ESD) or electromagnetic interference (EMI).