Invention Grant
- Patent Title: Method for fabricating capacitor utilizes a sacrificial pattern enclosing the upper outer walls of the storage nodes
- Patent Title (中): 用于制造电容器的方法利用包围存储节点的上外壁的牺牲图案
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Application No.: US13069290Application Date: 2011-03-22
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Publication No.: US08048757B2Publication Date: 2011-11-01
- Inventor: Jae-Sung Roh , Kee-Jeung Lee , Han-Sang Song , Seung-Jin Yeom , Deok-Sin Kil , Young-Dae Kim , Jin-Hyock Kim
- Applicant: Jae-Sung Roh , Kee-Jeung Lee , Han-Sang Song , Seung-Jin Yeom , Deok-Sin Kil , Young-Dae Kim , Jin-Hyock Kim
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Kilpatrick Townsend & Stockton LLP
- Priority: KR10-2006-0097312 20061002
- Main IPC: H01L21/20
- IPC: H01L21/20

Abstract:
A method for fabricating a capacitor includes forming an isolation layer over a cell region and a peripheral region of a substrate. The isolation layer forms a plurality of open regions in the cell region. Storage nodes are formed on surfaces of the open regions. An upper portion of the isolation layer is etched to expose upper outer walls of the storage nodes. A sacrificial pattern is formed over the isolation layer to enclose the upper outer walls of the storage nodes. The isolation layer in the peripheral region is etched to expose side portions of the resulting structure obtained after forming the sacrificial pattern in the cell region. With the sacrificial pattern supporting the storage nodes, the isolation layer in the cell region is removed. The sacrificial pattern is then removed.
Public/Granted literature
- US20110171807A1 METHOD FOR FABRICATING CAPACITOR Public/Granted day:2011-07-14
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