Invention Grant
- Patent Title: Method for fabricating a MOS transistor with source/well heterojunction and related structure
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Application No.: US12583977Application Date: 2009-08-28
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Publication No.: US08048765B2Publication Date: 2011-11-01
- Inventor: Xiangdong Chen , Bruce Chih-Chieh Shen , Henry Kuo-Shun Chen
- Applicant: Xiangdong Chen , Bruce Chih-Chieh Shen , Henry Kuo-Shun Chen
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: Farjami & Farjami LLP
- Main IPC: H01L21/76
- IPC: H01L21/76

Abstract:
According to an exemplary embodiment, a method for fabricating a MOS transistor, such as an LDMOS transistor, includes forming a gate stack over a well. The method further includes forming a recess in the well adjacent to a first sidewall of the gate stack. The method further includes forming a source region in the recess such that a heterojunction is formed between the source region and the well. The method further includes forming a drain region spaced apart from a second sidewall of the gate stack. In one embodiment, the source region can comprise silicon germanium and the well can comprise silicon. In another embodiment, the source region can comprise silicon carbide and the well can comprise silicon.
Public/Granted literature
- US20110049620A1 Method for fabricating a MOS transistor with source/well heterojunction and related structure Public/Granted day:2011-03-03
Information query
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