Invention Grant
- Patent Title: Integrated circuit package having integrated faraday shield
- Patent Title (中): 具有集成法拉第屏蔽的集成电路封装
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Application No.: US12775875Application Date: 2010-05-07
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Publication No.: US08049119B2Publication Date: 2011-11-01
- Inventor: Stanley C Beddingfield , Jean-Francois Drouard
- Applicant: Stanley C Beddingfield , Jean-Francois Drouard
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Yingsheng Tung; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H05K9/00
- IPC: H05K9/00

Abstract:
A packaged integrated circuit (IC) (100) includes a first substrate (110) comprising a first plurality of layers and a first circuit coupling features (112) at an upper surface of the first substrate (110), the first plurality of layers including a first electromagnetic interference shielding layer (132). The packaged IC also includes a second substrate (106) having an upper surface attached to a lower surface of the first substrate (110) by an electrically conductive adhesive material (136). The second substrate (106) includes a second plurality of layers and a second circuit coupling feature (108) at a lower surface of the second substrate (106). The first plurality of layer includes a second EMI shielding layer (134). The packaged IC further includes a functional die (124) disposed between the first (110) and the second (106) substrates and functionally coupled to the first (112) and/or the second (108) circuit coupling features. In the packaged IC, the adhesive material (136) electrically couples the first (132) and the second (134) shielding layers.
Public/Granted literature
- US20100214759A1 Integrated Circuit Package Having Integrated Faraday Shield Public/Granted day:2010-08-26
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