Invention Grant
US08049249B1 Integrated circuit devices with ESD protection in scribe line, and methods for fabricating same
有权
在划线中具有ESD保护的集成电路器件及其制造方法
- Patent Title: Integrated circuit devices with ESD protection in scribe line, and methods for fabricating same
- Patent Title (中): 在划线中具有ESD保护的集成电路器件及其制造方法
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Application No.: US11521731Application Date: 2006-09-14
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Publication No.: US08049249B1Publication Date: 2011-11-01
- Inventor: Chuan-Cheng Cheng , Choy Hing Li , Shuhua Yu
- Applicant: Chuan-Cheng Cheng , Choy Hing Li , Shuhua Yu
- Applicant Address: BM Hamilton
- Assignee: Marvell International Ltd.
- Current Assignee: Marvell International Ltd.
- Current Assignee Address: BM Hamilton
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/58 ; H01L23/485
Abstract:
A semiconductor wafer with an electrostatic discharge (ESD) protective device is disclosed. The semiconductor wafer includes first and second adjacent semiconductor die regions, a protective device in a scribe line region between the first and second die regions, and at least one metal line on a surface of the first die region, wherein the metal line(s) is/are in electrical communication with the protective device.
Information query
IPC分类:
