Invention Grant
- Patent Title: Symmetric non-intrusive and covert technique to render a transistor permanently non-operable
- Patent Title (中): 对称非侵入和隐蔽技术使晶体管永久不可操作
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Application No.: US12960126Application Date: 2010-12-03
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Publication No.: US08049281B1Publication Date: 2011-11-01
- Inventor: Lap-Wai Chow , William M. Clark, Jr. , Gavin J. Harbison , Paul Ou Yang
- Applicant: Lap-Wai Chow , William M. Clark, Jr. , Gavin J. Harbison , Paul Ou Yang
- Applicant Address: US CA Malibu
- Assignee: HRL Laboratories, LLC
- Current Assignee: HRL Laboratories, LLC
- Current Assignee Address: US CA Malibu
- Agency: Ladas & Parry
- Main IPC: H01L29/76
- IPC: H01L29/76
Abstract:
A technique for and structures for camouflaging an integrated circuit structure. The technique including forming active areas of a first conductivity type and LDD regions of a second conductivity type resulting in a transistor that is always non-operational when standard voltages are applied to the device.
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