Invention Grant
- Patent Title: Semiconductor device with power noise suppression
- Patent Title (中): 具有功率噪声抑制的半导体器件
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Application No.: US12107758Application Date: 2008-04-22
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Publication No.: US08049303B2Publication Date: 2011-11-01
- Inventor: Hideki Osaka , Tatsuya Saito
- Applicant: Hideki Osaka , Tatsuya Saito
- Applicant Address: JP Tokyo
- Assignee: Hitachi, Ltd.
- Current Assignee: Hitachi, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Miles & Stockbridge P.C.
- Priority: JP2007-112574 20070423
- Main IPC: H01L45/00
- IPC: H01L45/00

Abstract:
A semiconductor chip and a semiconductor device mounting the semiconductor chip capable of increasing a capacitance of a capacitor without reducing the number of signal bumps or power bumps of a package and the number of C4 solder balls of the semiconductor chip, and achieving a stable power supply with suppressing fluctuations of power at a resonance frequency without a limitation in a position to mount a capacitor for lowering noise of a signal transceiving interface block. In the semiconductor device, a via hole is provided to the semiconductor chip, a power-supply electrode connected to the via hole is provided to a back surface of the semiconductor chip, and a capacitor is mounted to the electrode on the back surface. And, a high-resistance material is used for a material of a power-supply via hole inside the semiconductor chip, thereby increasing the resistance and lowering the Q factor.
Public/Granted literature
- US20080258259A1 SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE Public/Granted day:2008-10-23
Information query
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