Invention Grant
- Patent Title: Stress-engineered resistance-change memory device
- Patent Title (中): 应力工程电阻变化记忆装置
-
Application No.: US12580196Application Date: 2009-10-15
-
Publication No.: US08049305B1Publication Date: 2011-11-01
- Inventor: Michael Miller , Prashant Phatak , Tony Chiang
- Applicant: Michael Miller , Prashant Phatak , Tony Chiang
- Applicant Address: US CA San Jose
- Assignee: Intermolecular, Inc.
- Current Assignee: Intermolecular, Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: H01L29/10
- IPC: H01L29/10

Abstract:
A resistance-change memory device using stress engineering is described, including a first layer including a first conductive electrode, a second layer above the first layer including a resistive-switching element, a third layer above the second layer including a second conductive electrode, where a first stress is created in the switching element at a first interface between the first layer and the second layer upon heating the memory element, and where a second stress is created in the switching element at a second interface between the second layer and the third layer upon the heating. A stress gradient equal to a difference between the first stress and the second stress has an absolute value greater than 50 MPa, and a reset voltage of the memory element has a polarity relative to a common electrical potential that has a sign opposite the stress gradient when applied to the first conductive electrode.
Information query
IPC分类: