Invention Grant
- Patent Title: Chip holder with wafer level redistribution layer
- Patent Title (中): 具有晶片级再分布层的芯片保持架
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Application No.: US11675984Application Date: 2007-02-16
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Publication No.: US08049323B2Publication Date: 2011-11-01
- Inventor: Chen-Shien Chen , Chao-Hsiang Yang , Jimmy Liang , Han-Liang Tseng , Mirng-Ji Lii , Tjandra Winata Karta , Hua-Shu Wu
- Applicant: Chen-Shien Chen , Chao-Hsiang Yang , Jimmy Liang , Han-Liang Tseng , Mirng-Ji Lii , Tjandra Winata Karta , Hua-Shu Wu
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/60

Abstract:
A chip holder formed of silicon, glass, other ceramics or other suitable materials includes a plurality of recesses for retaining semiconductor chips. The bond pads of the semiconductor chip are formed on or over an area of the chip holder that surrounds the semiconductor chip thus expanding the bonding area. The bond pads are coupled, using semiconductor wafer processing techniques, to internal bond pads formed directly on the semiconductor chip.
Public/Granted literature
- US20080197473A1 CHIP HOLDER WITH WAFER LEVEL REDISTRIBUTION LAYER Public/Granted day:2008-08-21
Information query
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