Invention Grant
US08049331B2 Structure and method for forming a capacitively coupled chip-to-chip signaling interface
有权
用于形成电容耦合芯片到芯片信令接口的结构和方法
- Patent Title: Structure and method for forming a capacitively coupled chip-to-chip signaling interface
- Patent Title (中): 用于形成电容耦合芯片到芯片信令接口的结构和方法
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Application No.: US12841846Application Date: 2010-07-22
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Publication No.: US08049331B2Publication Date: 2011-11-01
- Inventor: Philip Neaves
- Applicant: Philip Neaves
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Priority: GB0323992.8 20031013
- Main IPC: H01L23/485
- IPC: H01L23/485
Abstract:
A system and method for providing capacitively-coupled signaling in a system-in-package (SiP) device is disclosed. In one embodiment, the system includes a first semiconductor device and an opposing second semiconductor device spaced apart from the first device, a dielectric layer interposed between the first device and the second device, a first conductive pad positioned in the first device, and a second conductive pad positioned in the second device that capacitively communicate signals from the second device to the first device. In another embodiment, a method of forming a SiP device includes forming a first pad on a surface of a first semiconductor device, forming a second pad on a surface of a second semiconductor device, and interposing a dielectric layer between the first semiconductor device and the second semiconductor device that separates the first conductive signal pad and the second conductive signal pad.
Public/Granted literature
- US20100283158A1 STRUCTURE AND METHOD FOR FORMING A CAPACITIVELY COUPLED CHIP-TO-CHIP SIGNALING INTERFACE Public/Granted day:2010-11-11
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