Invention Grant
- Patent Title: Memory page boosting method, device and system
- Patent Title (中): 内存页面提升方法,设备和系统
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Application No.: US12787601Application Date: 2010-05-26
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Publication No.: US08050090B2Publication Date: 2011-11-01
- Inventor: Seiichi Aritome , Jeffrey C. Antosh , Roderick C. Frianeza
- Applicant: Seiichi Aritome , Jeffrey C. Antosh , Roderick C. Frianeza
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
A memory page boosting method, device and system for boosting unselected memory cells in a multi-level cell memory cell is described. The memory device includes a memory array of multi-level cell memory cells configured to store a first portion of logic states and a second portion of logic states. When programming the first portion of logic states, a first boosting process is applied to unselected memory cells and when programming the second portion of logic states, a second boosting process is applied to unselected memory cells.
Public/Granted literature
- US20100232222A1 MEMORY PAGE BOOSTING METHOD, DEVICE AND SYSTEM Public/Granted day:2010-09-16
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