Invention Grant
US08050119B2 Data output timing in response to read command based on whether delay locked loop is enabled/disabled in a semiconductor device
有权
响应于基于在半导体器件中是否允许/禁止延迟锁定环的读取命令的数据输出定时
- Patent Title: Data output timing in response to read command based on whether delay locked loop is enabled/disabled in a semiconductor device
- Patent Title (中): 响应于基于在半导体器件中是否允许/禁止延迟锁定环的读取命令的数据输出定时
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Application No.: US12165097Application Date: 2008-06-30
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Publication No.: US08050119B2Publication Date: 2011-11-01
- Inventor: Ki-Chon Park
- Applicant: Ki-Chon Park
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2007-0137431 20071226
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A semiconductor memory device can output data according to a predetermined data output timing, in spite of a high frequency of system clock, even when a delay locked loop is disabled. The semiconductor memory device includes a delay locked loop configured to perform a delay locking operation on an internal clock to output delay locked clock, and a data output control unit configured to determine a data output timing, according to whether the delay locked loop is enabled or disabled, in response to a read command.
Public/Granted literature
- US20090168568A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME Public/Granted day:2009-07-02
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