Invention Grant
US08050367B2 Receiving amplitude correction circuit, receiving amplitude correction method, and receiver using the same
失效
接收振幅校正电路,接收振幅校正方法,以及接收振幅校正方法
- Patent Title: Receiving amplitude correction circuit, receiving amplitude correction method, and receiver using the same
- Patent Title (中): 接收振幅校正电路,接收振幅校正方法,以及接收振幅校正方法
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Application No.: US12066877Application Date: 2006-09-14
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Publication No.: US08050367B2Publication Date: 2011-11-01
- Inventor: Masaki Ichihara
- Applicant: Masaki Ichihara
- Applicant Address: JP Tokyo
- Assignee: NEC Corporation
- Current Assignee: NEC Corporation
- Current Assignee Address: JP Tokyo
- Priority: JP2005-266179 20050914
- International Application: PCT/JP2006/318665 WO 20060914
- International Announcement: WO2007/032550 WO 20070322
- Main IPC: H04L27/08
- IPC: H04L27/08

Abstract:
Input average levels and output average levels of digital channel filters 217 and 218 are computed in amplitude calculation circuits 101 and 102. In a gain difference calculation circuit 103, a gain difference of the input levels and the output levels is computed as a multiplier α so that a difference between the input levels and the output levels are eliminated or adjusted to be within a certain value. The outputs of the digital channel filters 217 and 218 are multiplied by the multiplier α in multiplier units 104 and 105. The multiplication results are outputted as corrected digital signals to a subsequent digital signal processing circuit.
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