Invention Grant
- Patent Title: Systems and methods for ASIC power consumption reduction
- Patent Title (中): 降低ASIC功耗的系统和方法
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Application No.: US11824348Application Date: 2007-06-29
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Publication No.: US08050781B2Publication Date: 2011-11-01
- Inventor: Jeffrey Douglas Scotten
- Applicant: Jeffrey Douglas Scotten
- Applicant Address: US CA Costa Mesa
- Assignee: Emulex Design & Manufacturing Corporation
- Current Assignee: Emulex Design & Manufacturing Corporation
- Current Assignee Address: US CA Costa Mesa
- Agency: Morrison & Foerster LLP
- Main IPC: G05B11/01
- IPC: G05B11/01 ; G06F19/00 ; G06F1/00 ; G06F1/26 ; G01P21/00 ; G04F1/00

Abstract:
Embodiments of the present invention are directed to dynamically measuring the speed of a circuit and modifying the operating voltage of the circuit based on the measured speed, in order to minimize the power being used while still ensuring proper operation of the circuit. Consequently, circuits of higher inherent speeds may have their voltages decreased (thus decreasing their actual speeds), while circuits of lower speeds may have their voltages increased, or kept the same. Thus, the resulting speeds of all circuits may be kept within a limited range to ensure proper operation. In addition, the power dissipated of circuits of higher speeds may be decreased.
Public/Granted literature
- US20090001960A1 Systems and methods for ASIC power consumption reduction Public/Granted day:2009-01-01
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