Invention Grant
- Patent Title: Method for producing semiconductor device
- Patent Title (中): 半导体器件的制造方法
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Application No.: US12805930Application Date: 2010-08-25
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Publication No.: US08053305B2Publication Date: 2011-11-08
- Inventor: Masahiko Yanagi
- Applicant: Masahiko Yanagi
- Applicant Address: JP Osaka
- Assignee: Sharp Kabushiki Kaisha
- Current Assignee: Sharp Kabushiki Kaisha
- Current Assignee Address: JP Osaka
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: JP2009-198973 20090828
- Main IPC: H01L21/8238
- IPC: H01L21/8238

Abstract:
The invention provides a method for producing a semiconductor device that can reduce the number of mask steps. In a CMOS production process, gate electrodes are formed in regions for forming an NMOS and a PMOS at the same time with a common mask pattern, and after the gate electrodes have been formed, a well, and source and drain regions are formed by impurity ion implantations with a common mask pattern in each region of the NMOS and the PMOS, using the gate electrode as a mask, whereby the number of mask steps is reduced.
Public/Granted literature
- US20110053325A1 Method for producing semiconductor device Public/Granted day:2011-03-03
Information query
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