Methods of fabricating semiconductor devices

Invention Grant

US08053309B2 Methods of fabricating semiconductor devices 有权

Title translation: 制造半导体器件的方法

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Patent Title: Methods of fabricating semiconductor devices
Patent Title (中): 制造半导体器件的方法
Application No.: US12656172

Application Date: 2010-01-20
Publication No.: US08053309B2

Publication Date: 2011-11-08
Inventor: In-jung Lee
Applicant: In-jung Lee
Applicant Address: KR Gyeonggi-do
Assignee: Samsung Electronics Co., Ltd.
Current Assignee: Samsung Electronics Co., Ltd.
Current Assignee Address: KR Gyeonggi-do
Agency: Harness, Dickey & Pierce, P.L.C.
Priority: KR10-2006-0063534 20060706
Main IPC: H01L21/8242
IPC: H01L21/8242

Methods of fabricating semiconductor devices

Abstract:

A semiconductor device includes a semiconductor substrate that includes first and second regions; first, second, and third insulating layers; a capacitor dielectric layer that includes first and second dielectric layers; a gate insulating layer formed on the first and second regions; a gate formed on the gate insulating layer of the second region; a first capacitor electrode formed on the capacitor dielectric layer; and impurity regions formed in the semiconductor substrate on sides of the gate. The first and second regions include first and second trenches, respectively. The third insulating layer is formed on the second insulating layer, which is formed on the first insulating layer, which is formed on an inner surface of the second trench. The second dielectric layer is formed on the first dielectric layer, which is formed on an inner surface of the first trench.

Abstract(Chinese):

半导体器件包括：包括第一和第二区域的半导体衬底; 第一，第二和第三绝缘层; 电容器电介质层，其包括第一和第二电介质层; 形成在所述第一和第二区域上的栅极绝缘层; 形成在第二区域的栅极绝缘层上的栅极; 形成在电容器电介质层上的第一电容器电极; 以及形成在栅极侧的半导体衬底中的杂质区。第一和第二区域分别包括第一和第二沟槽。第三绝缘层形成在第二绝缘层上，该第二绝缘层形成在形成在第二沟槽的内表面上的第一绝缘层上。第二电介质层形成在形成在第一沟槽的内表面上的第一电介质层上。

Public/Granted literature

US20100124806A1 Methods of fabricating semiconductor devices Public/Granted day:2010-05-20

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8239	........存储器结构
H01L21/8242	.........动态随机存取存储结构（DRAM）