Method to manufacture split gate with high density plasma oxide layer as inter-polysilicon insulation layer

Invention Grant

US08053315B2 Method to manufacture split gate with high density plasma oxide layer as inter-polysilicon insulation layer 有权

Title translation: 用高密度等离子体氧化物层制造分裂栅的多晶硅绝缘层的方法

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Patent Title: Method to manufacture split gate with high density plasma oxide layer as inter-polysilicon insulation layer
Patent Title (中): 用高密度等离子体氧化物层制造分裂栅的多晶硅绝缘层的方法
Application No.: US12589045

Application Date: 2009-10-16
Publication No.: US08053315B2

Publication Date: 2011-11-08
Inventor: Sung-Shan Tai , Yong-Zhong Hu , François Hébert , Hong Chang , Mengyu Pan , Yingying Lou , Yu Wang
Applicant: Sung-Shan Tai , Yong-Zhong Hu , François Hébert , Hong Chang , Mengyu Pan , Yingying Lou , Yu Wang
Applicant Address: BM
Assignee: Alpha & Omega Semiconductor, LTD
Current Assignee: Alpha & Omega Semiconductor, LTD
Current Assignee Address: BM
Agent Bo-In Lin
Main IPC: H01L21/336
IPC: H01L21/336

Method to manufacture split gate with high density plasma oxide layer as inter-polysilicon insulation layer

Abstract:

This invention discloses a method of manufacturing a trenched semiconductor power device with split gate filling a trench opened in a semiconductor substrate wherein the split gate is separated by an inter-poly insulation layer disposed between a top and a bottom gate segments. The method further includes a step of forming the inter-poly layer by applying a RTP process after a HDP oxide deposition process to bring an etch rate of the HDP oxide layer close to an etch rate of a thermal oxide.

Abstract(Chinese):

本发明公开了一种制造沟槽半导体功率器件的方法，该半导体功率器件具有填充在半导体衬底中开口的沟槽的分离栅极，其中，分离栅极由设置在顶部栅极段和底部栅极段之间的多晶硅绝缘层分开。该方法还包括通过在HDP氧化物沉积工艺之后施加RTP工艺以形成HDP氧化物层的蚀刻速率接近热氧化物的蚀刻速率来形成多晶硅层之间的步骤。

Public/Granted literature

US20100099230A1 Method to manufacture split gate with high density plasma oxide layer as inter-polysilicon insulation layer Public/Granted day:2010-04-22

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/18	...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料
H01L21/334	....制造单极型器件的台阶式工艺
H01L21/335	.....场效应晶体管
H01L21/336	......带有绝缘栅的