Invention Grant
US08053346B2 Semiconductor device and method of forming gate and metal line thereof with dummy pattern and auxiliary pattern 失效
半导体器件及其形成具有虚拟图案和辅助图案的栅极及其金属线的方法

Semiconductor device and method of forming gate and metal line thereof with dummy pattern and auxiliary pattern
Abstract:
A gate in a semiconductor device is formed to have a dummy gate pattern that protects a gate. Metal lines are formed to supply power for a semiconductor device and transfer a signal. A semiconductor device includes a quad coupled receiver type input/output buffer. The semiconductor device is formed with a gate line that extends over an active region, and a gate pad located outside of the active region. The gate line and the gate pad are adjoined such that the gate line and a side of the gate pad form a line. Dummy gates may also be applied. The semiconductor device includes a first metal line patterns supplying power to a block having a plurality of cells, a second metal line pattern transferring a signal to the cells, and dummy metal line patterns divided into in a longitudinal direction.
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