Invention Grant
- Patent Title: Standing chip scale package
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Application No.: US12217136Application Date: 2008-06-30
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Publication No.: US08053891B2Publication Date: 2011-11-08
- Inventor: Tao Feng , Anup Bhalla , Yueh-Se Ho
- Applicant: Tao Feng , Anup Bhalla , Yueh-Se Ho
- Applicant Address: US CA Sunnyvale
- Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee Address: US CA Sunnyvale
- Agency: Schein & Cai LLP
- Agent Jingming Cai
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A standing chip scale package is disclosed. The standing chip scale package provides electrical connection to bumped device contacts on both sides of the chip. The package is coupleable to a printed circuit board in a standing configuration such that front and back sides of the bumped chip are substantially perpendicular to a mounting surface. A process of fabricating the standing chip scale package is also disclosed.
Public/Granted literature
- US20090321929A1 Standing chip scale package Public/Granted day:2009-12-31
Information query
IPC分类: